<?xml version="1.0" encoding="UTF-8"?>
<system name="CORE_SOPC">
 <parameter name="bonusData"><![CDATA[bonusData 
{
   element CORE_SOPC
   {
   }
   element jtag_uart.avalon_jtag_slave
   {
      datum baseAddress
      {
         value = "6344";
         type = "long";
      }
   }
   element bl_n
   {
      datum _sortIndex
      {
         value = "16";
         type = "int";
      }
   }
   element bl_p
   {
      datum _sortIndex
      {
         value = "15";
         type = "int";
      }
   }
   element clk
   {
      datum _sortIndex
      {
         value = "0";
         type = "int";
      }
   }
   element sysid.control_slave
   {
      datum baseAddress
      {
         value = "6336";
         type = "long";
      }
   }
   element cpu
   {
      datum _sortIndex
      {
         value = "1";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element epcs
   {
      datum _sortIndex
      {
         value = "3";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element epcs.epcs_control_port
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "0";
         type = "long";
      }
   }
   element cpu.jtag_debug_module
   {
      datum baseAddress
      {
         value = "4096";
         type = "long";
      }
   }
   element jtag_uart
   {
      datum _sortIndex
      {
         value = "5";
         type = "int";
      }
   }
   element lcd32_data
   {
      datum _sortIndex
      {
         value = "13";
         type = "int";
      }
   }
   element lcd_cs
   {
      datum _sortIndex
      {
         value = "7";
         type = "int";
      }
   }
   element lcd_rd
   {
      datum _sortIndex
      {
         value = "14";
         type = "int";
      }
   }
   element lcd_rs
   {
      datum _sortIndex
      {
         value = "9";
         type = "int";
      }
   }
   element lcd_wr
   {
      datum _sortIndex
      {
         value = "12";
         type = "int";
      }
   }
   element reset
   {
      datum _sortIndex
      {
         value = "11";
         type = "int";
      }
   }
   element reset.s1
   {
      datum baseAddress
      {
         value = "6240";
         type = "long";
      }
   }
   element sdram.s1
   {
      datum baseAddress
      {
         value = "67108864";
         type = "long";
      }
   }
   element lcd_rd.s1
   {
      datum baseAddress
      {
         value = "6288";
         type = "long";
      }
   }
   element lcd32_data.s1
   {
      datum baseAddress
      {
         value = "6272";
         type = "long";
      }
   }
   element bl_n.s1
   {
      datum baseAddress
      {
         value = "6320";
         type = "long";
      }
   }
   element touch_cs.s1
   {
      datum baseAddress
      {
         value = "6192";
         type = "long";
      }
   }
   element lcd_cs.s1
   {
      datum baseAddress
      {
         value = "6176";
         type = "long";
      }
   }
   element bl_p.s1
   {
      datum baseAddress
      {
         value = "6304";
         type = "long";
      }
   }
   element lcd_rs.s1
   {
      datum baseAddress
      {
         value = "6208";
         type = "long";
      }
   }
   element lcd_wr.s1
   {
      datum baseAddress
      {
         value = "6256";
         type = "long";
      }
   }
   element touch_irq.s1
   {
      datum baseAddress
      {
         value = "6224";
         type = "long";
      }
   }
   element sdram
   {
      datum _sortIndex
      {
         value = "4";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
   }
   element spi_touch.spi_control_port
   {
      datum baseAddress
      {
         value = "6144";
         type = "long";
      }
   }
   element spi_touch
   {
      datum _sortIndex
      {
         value = "6";
         type = "int";
      }
   }
   element sysid
   {
      datum _sortIndex
      {
         value = "2";
         type = "int";
      }
   }
   element touch_cs
   {
      datum _sortIndex
      {
         value = "8";
         type = "int";
      }
   }
   element touch_irq
   {
      datum _sortIndex
      {
         value = "10";
         type = "int";
      }
   }
}
]]></parameter>
 <parameter name="clockCrossingAdapter" value="HANDSHAKE" />
 <parameter name="deviceFamily" value="CYCLONEIVE" />
 <parameter name="fabricMode" value="SOPC" />
 <parameter name="generateLegacySim" value="false" />
 <parameter name="generationId" value="0" />
 <parameter name="globalResetBus" value="true" />
 <parameter name="hdlLanguage" value="VERILOG" />
 <parameter name="maxAdditionalLatency" value="0" />
 <parameter name="projectName" value="LED_hello_world.qpf" />
 <parameter name="sopcBorderPoints" value="true" />
 <parameter name="systemHash" value="67047415232" />
 <parameter name="timeStamp" value="1346922198062" />
 <module kind="clock_source" version="11.0" enabled="1" name="clk">
  <parameter name="clockFrequency" value="50000000" />
  <parameter name="clockFrequencyKnown" value="true" />
  <parameter name="inputClockFrequency" value="0" />
  <parameter name="resetSynchronousEdges" value="NONE" />
 </module>
 <module kind="altera_nios2" version="11.0" enabled="1" name="cpu">
  <parameter name="userDefinedSettings" value="" />
  <parameter name="tightlyCoupledInstructionMaster3MapParam" value="" />
  <parameter name="tightlyCoupledInstructionMaster3AddrWidth" value="1" />
  <parameter name="tightlyCoupledInstructionMaster2MapParam" value="" />
  <parameter name="tightlyCoupledInstructionMaster2AddrWidth" value="1" />
  <parameter name="tightlyCoupledInstructionMaster1MapParam" value="" />
  <parameter name="tightlyCoupledInstructionMaster1AddrWidth" value="1" />
  <parameter name="tightlyCoupledInstructionMaster0MapParam" value="" />
  <parameter name="tightlyCoupledInstructionMaster0AddrWidth" value="1" />
  <parameter name="tightlyCoupledDataMaster3MapParam" value="" />
  <parameter name="tightlyCoupledDataMaster3AddrWidth" value="1" />
  <parameter name="tightlyCoupledDataMaster2MapParam" value="" />
  <parameter name="tightlyCoupledDataMaster2AddrWidth" value="1" />
  <parameter name="tightlyCoupledDataMaster1MapParam" value="" />
  <parameter name="tightlyCoupledDataMaster1AddrWidth" value="1" />
  <parameter name="tightlyCoupledDataMaster0MapParam" value="" />
  <parameter name="tightlyCoupledDataMaster0AddrWidth" value="1" />
  <parameter name="setting_showUnpublishedSettings" value="false" />
  <parameter name="setting_showInternalSettings" value="false" />
  <parameter name="setting_shadowRegisterSets" value="0" />
  <parameter name="setting_preciseSlaveAccessErrorException" value="false" />
  <parameter name="setting_preciseIllegalMemAccessException" value="false" />
  <parameter name="setting_preciseDivisionErrorException" value="false" />
  <parameter name="setting_performanceCounter" value="false" />
  <parameter name="setting_perfCounterWidth" value="_32" />
  <parameter name="setting_interruptControllerType" value="Internal" />
  <parameter name="setting_illegalMemAccessDetection" value="false" />
  <parameter name="setting_illegalInstructionsTrap" value="false" />
  <parameter name="setting_fullWaveformSignals" value="false" />
  <parameter name="setting_extraExceptionInfo" value="false" />
  <parameter name="setting_exportPCB" value="false" />
  <parameter name="setting_debugSimGen" value="false" />
  <parameter name="setting_clearXBitsLDNonBypass" value="true" />
  <parameter name="setting_branchPredictionType" value="Automatic" />
  <parameter name="setting_bit31BypassDCache" value="true" />
  <parameter name="setting_bigEndian" value="false" />
  <parameter name="setting_bhtPtrSz" value="_8" />
  <parameter name="setting_bhtIndexPcOnly" value="false" />
  <parameter name="setting_avalonDebugPortPresent" value="false" />
  <parameter name="setting_alwaysEncrypt" value="true" />
  <parameter name="setting_allowFullAddressRange" value="false" />
  <parameter name="setting_activateTrace" value="true" />
  <parameter name="setting_activateTestEndChecker" value="false" />
  <parameter name="setting_activateMonitors" value="true" />
  <parameter name="setting_activateModelChecker" value="false" />
  <parameter name="setting_HDLSimCachesCleared" value="true" />
  <parameter name="setting_HBreakTest" value="false" />
  <parameter name="resetSlave">epcs.epcs_control_port</parameter>
  <parameter name="resetOffset" value="0" />
  <parameter name="muldiv_multiplierType" value="EmbeddedMulFast" />
  <parameter name="muldiv_divider" value="false" />
  <parameter name="mpu_useLimit" value="false" />
  <parameter name="mpu_numOfInstRegion" value="8" />
  <parameter name="mpu_numOfDataRegion" value="8" />
  <parameter name="mpu_minInstRegionSize" value="_12" />
  <parameter name="mpu_minDataRegionSize" value="_12" />
  <parameter name="mpu_enabled" value="false" />
  <parameter name="mmu_uitlbNumEntries" value="_4" />
  <parameter name="mmu_udtlbNumEntries" value="_6" />
  <parameter name="mmu_tlbPtrSz" value="_7" />
  <parameter name="mmu_tlbNumWays" value="_16" />
  <parameter name="mmu_processIDNumBits" value="_8" />
  <parameter name="mmu_enabled" value="false" />
  <parameter name="mmu_autoAssignTlbPtrSz" value="true" />
  <parameter name="mmu_TLBMissExcSlave" value="" />
  <parameter name="mmu_TLBMissExcOffset" value="0" />
  <parameter name="manuallyAssignCpuID" value="false" />
  <parameter name="internalIrqMaskSystemInfo" value="7" />
  <parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='epcs.epcs_control_port' start='0x0' end='0x800' /><slave name='cpu.jtag_debug_module' start='0x1000' end='0x1800' /><slave name='sdram.s1' start='0x4000000' end='0x6000000' /></address-map>]]></parameter>
  <parameter name="instAddrWidth" value="27" />
  <parameter name="impl" value="Fast" />
  <parameter name="icache_size" value="_2048" />
  <parameter name="icache_ramBlockType" value="Automatic" />
  <parameter name="icache_numTCIM" value="_0" />
  <parameter name="icache_burstType" value="None" />
  <parameter name="exceptionSlave" value="sdram.s1" />
  <parameter name="exceptionOffset" value="32" />
  <parameter name="deviceFeaturesSystemInfo">M512_MEMORY 0 M4K_MEMORY 0 M9K_MEMORY 1 M20K_MEMORY 0 M144K_MEMORY 0 MRAM_MEMORY 0 MLAB_MEMORY 0 ESB 0 EPCS 1 DSP 0 EMUL 1 HARDCOPY 0 LVDS_IO 1 ADDRESS_STALL 1 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 DSP_SHIFTER_BLOCK 0</parameter>
  <parameter name="deviceFamilyName" value="Cyclone IV E" />
  <parameter name="debug_triggerArming" value="true" />
  <parameter name="debug_level" value="Level1" />
  <parameter name="debug_jtagInstanceID" value="0" />
  <parameter name="debug_embeddedPLL" value="true" />
  <parameter name="debug_debugReqSignals" value="false" />
  <parameter name="debug_assignJtagInstanceID" value="false" />
  <parameter name="debug_OCIOnchipTrace" value="_128" />
  <parameter name="dcache_size" value="_0" />
  <parameter name="dcache_ramBlockType" value="Automatic" />
  <parameter name="dcache_omitDataMaster" value="false" />
  <parameter name="dcache_numTCDM" value="_0" />
  <parameter name="dcache_lineSize" value="_32" />
  <parameter name="dcache_bursts" value="false" />
  <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='epcs.epcs_control_port' start='0x0' end='0x800' /><slave name='cpu.jtag_debug_module' start='0x1000' end='0x1800' /><slave name='spi_touch.spi_control_port' start='0x1800' end='0x1820' /><slave name='lcd_cs.s1' start='0x1820' end='0x1830' /><slave name='touch_cs.s1' start='0x1830' end='0x1840' /><slave name='lcd_rs.s1' start='0x1840' end='0x1850' /><slave name='touch_irq.s1' start='0x1850' end='0x1860' /><slave name='reset.s1' start='0x1860' end='0x1870' /><slave name='lcd_wr.s1' start='0x1870' end='0x1880' /><slave name='lcd32_data.s1' start='0x1880' end='0x1890' /><slave name='lcd_rd.s1' start='0x1890' end='0x18A0' /><slave name='bl_p.s1' start='0x18A0' end='0x18B0' /><slave name='bl_n.s1' start='0x18B0' end='0x18C0' /><slave name='sysid.control_slave' start='0x18C0' end='0x18C8' /><slave name='jtag_uart.avalon_jtag_slave' start='0x18C8' end='0x18D0' /><slave name='sdram.s1' start='0x4000000' end='0x6000000' /></address-map>]]></parameter>
  <parameter name="dataAddrWidth" value="27" />
  <parameter name="customInstSlavesSystemInfo" value="&lt;info/&gt;" />
  <parameter name="cpuReset" value="false" />
  <parameter name="cpuID" value="0" />
  <parameter name="clockFrequency" value="50000000" />
  <parameter name="breakSlave">cpu.jtag_debug_module</parameter>
  <parameter name="breakOffset" value="32" />
 </module>
 <module kind="altera_avalon_sysid" version="11.0" enabled="1" name="sysid">
  <parameter name="id" value="0" />
 </module>
 <module
   kind="altera_avalon_epcs_flash_controller"
   version="11.0"
   enabled="1"
   name="epcs">
  <parameter name="autoSelectASMIAtom" value="true" />
  <parameter name="deviceFamilyString" value="Cyclone IV E" />
  <parameter name="useASMIAtom" value="false" />
 </module>
 <module
   kind="altera_avalon_new_sdram_controller"
   version="11.0"
   enabled="1"
   name="sdram">
  <parameter name="TAC" value="5.5" />
  <parameter name="TMRD" value="3" />
  <parameter name="TRCD" value="20.0" />
  <parameter name="TRFC" value="70.0" />
  <parameter name="TRP" value="20.0" />
  <parameter name="TWR" value="14.0" />
  <parameter name="casLatency" value="3" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="columnWidth" value="9" />
  <parameter name="dataWidth" value="16" />
  <parameter name="generateSimulationModel" value="false" />
  <parameter name="initNOPDelay" value="0.0" />
  <parameter name="initRefreshCommands" value="2" />
  <parameter name="masteredTristateBridgeSlave" value="" />
  <parameter name="model" value="custom" />
  <parameter name="numberOfBanks" value="4" />
  <parameter name="numberOfChipSelects" value="1" />
  <parameter name="pinsSharedViaTriState" value="false" />
  <parameter name="powerUpDelay" value="100.0" />
  <parameter name="refreshPeriod" value="15.625" />
  <parameter name="registerDataIn" value="true" />
  <parameter name="rowWidth" value="13" />
 </module>
 <module
   kind="altera_avalon_jtag_uart"
   version="11.0"
   enabled="1"
   name="jtag_uart">
  <parameter name="allowMultipleConnections" value="false" />
  <parameter name="hubInstanceID" value="0" />
  <parameter name="readBufferDepth" value="64" />
  <parameter name="readIRQThreshold" value="8" />
  <parameter name="simInputCharacterStream" value="" />
  <parameter name="simInteractiveOptions">INTERACTIVE_ASCII_OUTPUT</parameter>
  <parameter name="useRegistersForReadBuffer" value="false" />
  <parameter name="useRegistersForWriteBuffer" value="false" />
  <parameter name="useRelativePathForSimFile" value="false" />
  <parameter name="writeBufferDepth" value="64" />
  <parameter name="writeIRQThreshold" value="8" />
 </module>
 <module kind="altera_avalon_spi" version="11.0" enabled="1" name="spi_touch">
  <parameter name="clockPhase" value="0" />
  <parameter name="clockPolarity" value="0" />
  <parameter name="dataWidth" value="8" />
  <parameter name="disableAvalonFlowControl" value="false" />
  <parameter name="inputClockRate" value="50000000" />
  <parameter name="insertDelayBetweenSlaveSelectAndSClk" value="false" />
  <parameter name="insertSync" value="false" />
  <parameter name="lsbOrderedFirst" value="false" />
  <parameter name="masterSPI" value="true" />
  <parameter name="numberOfSlaves" value="1" />
  <parameter name="syncRegDepth" value="2" />
  <parameter name="targetClockRate" value="1000000" />
  <parameter name="targetSlaveSelectToSClkDelay" value="0.0" />
 </module>
 <module kind="altera_avalon_pio" version="11.0" enabled="1" name="lcd_cs">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="false" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="1" />
 </module>
 <module kind="altera_avalon_pio" version="11.0" enabled="1" name="touch_cs">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="false" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="1" />
 </module>
 <module kind="altera_avalon_pio" version="11.0" enabled="1" name="lcd_rs">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="false" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="1" />
 </module>
 <module kind="altera_avalon_pio" version="11.0" enabled="1" name="touch_irq">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Input" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="false" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="1" />
 </module>
 <module kind="altera_avalon_pio" version="11.0" enabled="1" name="reset">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="false" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="1" />
 </module>
 <module kind="altera_avalon_pio" version="11.0" enabled="1" name="lcd_wr">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="false" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="1" />
 </module>
 <module kind="altera_avalon_pio" version="11.0" enabled="1" name="lcd32_data">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Bidir" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="false" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="16" />
 </module>
 <module kind="altera_avalon_pio" version="11.0" enabled="1" name="lcd_rd">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="false" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="1" />
 </module>
 <module kind="altera_avalon_pio" version="11.0" enabled="1" name="bl_p">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="false" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="1" />
 </module>
 <module kind="altera_avalon_pio" version="11.0" enabled="1" name="bl_n">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="false" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="1" />
 </module>
 <connection kind="clock" version="11.0" start="clk.clk" end="cpu.clk" />
 <connection
   kind="avalon"
   version="11.0"
   start="cpu.instruction_master"
   end="cpu.jtag_debug_module">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x1000" />
 </connection>
 <connection
   kind="avalon"
   version="11.0"
   start="cpu.data_master"
   end="cpu.jtag_debug_module">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x1000" />
 </connection>
 <connection kind="clock" version="11.0" start="clk.clk" end="sysid.clk" />
 <connection
   kind="avalon"
   version="11.0"
   start="cpu.data_master"
   end="sysid.control_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x18c0" />
 </connection>
 <connection kind="clock" version="11.0" start="clk.clk" end="epcs.clk" />
 <connection
   kind="avalon"
   version="11.0"
   start="cpu.instruction_master"
   end="epcs.epcs_control_port">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0000" />
 </connection>
 <connection
   kind="avalon"
   version="11.0"
   start="cpu.data_master"
   end="epcs.epcs_control_port">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0000" />
 </connection>
 <connection kind="interrupt" version="11.0" start="cpu.d_irq" end="epcs.irq">
  <parameter name="irqNumber" value="0" />
 </connection>
 <connection kind="clock" version="11.0" start="clk.clk" end="sdram.clk" />
 <connection
   kind="avalon"
   version="11.0"
   start="cpu.instruction_master"
   end="sdram.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x04000000" />
 </connection>
 <connection kind="avalon" version="11.0" start="cpu.data_master" end="sdram.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x04000000" />
 </connection>
 <connection kind="clock" version="11.0" start="clk.clk" end="jtag_uart.clk" />
 <connection
   kind="avalon"
   version="11.0"
   start="cpu.data_master"
   end="jtag_uart.avalon_jtag_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x18c8" />
 </connection>
 <connection kind="interrupt" version="11.0" start="cpu.d_irq" end="jtag_uart.irq">
  <parameter name="irqNumber" value="1" />
 </connection>
 <connection kind="clock" version="11.0" start="clk.clk" end="spi_touch.clk" />
 <connection
   kind="avalon"
   version="11.0"
   start="cpu.data_master"
   end="spi_touch.spi_control_port">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x1800" />
 </connection>
 <connection kind="interrupt" version="11.0" start="cpu.d_irq" end="spi_touch.irq">
  <parameter name="irqNumber" value="2" />
 </connection>
 <connection kind="clock" version="11.0" start="clk.clk" end="lcd_cs.clk" />
 <connection kind="avalon" version="11.0" start="cpu.data_master" end="lcd_cs.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x1820" />
 </connection>
 <connection kind="clock" version="11.0" start="clk.clk" end="touch_cs.clk" />
 <connection
   kind="avalon"
   version="11.0"
   start="cpu.data_master"
   end="touch_cs.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x1830" />
 </connection>
 <connection kind="clock" version="11.0" start="clk.clk" end="lcd_rs.clk" />
 <connection kind="avalon" version="11.0" start="cpu.data_master" end="lcd_rs.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x1840" />
 </connection>
 <connection kind="clock" version="11.0" start="clk.clk" end="touch_irq.clk" />
 <connection
   kind="avalon"
   version="11.0"
   start="cpu.data_master"
   end="touch_irq.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x1850" />
 </connection>
 <connection kind="clock" version="11.0" start="clk.clk" end="reset.clk" />
 <connection kind="avalon" version="11.0" start="cpu.data_master" end="reset.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x1860" />
 </connection>
 <connection kind="clock" version="11.0" start="clk.clk" end="lcd_wr.clk" />
 <connection kind="avalon" version="11.0" start="cpu.data_master" end="lcd_wr.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x1870" />
 </connection>
 <connection kind="clock" version="11.0" start="clk.clk" end="lcd32_data.clk" />
 <connection
   kind="avalon"
   version="11.0"
   start="cpu.data_master"
   end="lcd32_data.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x1880" />
 </connection>
 <connection kind="clock" version="11.0" start="clk.clk" end="lcd_rd.clk" />
 <connection kind="avalon" version="11.0" start="cpu.data_master" end="lcd_rd.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x1890" />
 </connection>
 <connection kind="clock" version="11.0" start="clk.clk" end="bl_p.clk" />
 <connection kind="avalon" version="11.0" start="cpu.data_master" end="bl_p.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x18a0" />
 </connection>
 <connection kind="clock" version="11.0" start="clk.clk" end="bl_n.clk" />
 <connection kind="avalon" version="11.0" start="cpu.data_master" end="bl_n.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x18b0" />
 </connection>
</system>
