Release Notes for STM32L4xx HAL Drivers

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# Release Notes for STM32L4xx HAL Drivers

Copyright 2016 STMicroelectronics

## Update History

### V1.5.1 / 31-May-2016

HAL Drivers changes

- HAL ADC driver

- Bypass multimode assert_param macro calls depending on configuration

- HAL CRC driver

- HAL_CRC_DeInit() resets CRC_IDR register to reset value

LL Drivers changes

- LL BUS driver
  - LL_APB1_GRP1_PERIPH_USBFS renamed to LL_APB1_GRP1_PERIPH_USB
- LL SYSTEM driver
  - Fix typo on LL_DBGMCU_APB1_xxx and LL_DBGMCU_APB2_xxx

### V1.5.0 / 29-April-2016

Main Changes

- Maintenance Release of HAL and Low Layer drivers

HAL Drivers changes

- Enhance HAL delay and timebase implementation

- Add new driver stm32l4xx_hal_timebase_tim_template.c which overrides the native HAL time base functions (defined as weak) to use the TIM peripheral as time base tick source. For more details about the usage of this driver, please refer to HAL\HAL_TimeBase example and FreeRTOS-based applications

- The following changes done on the HAL drivers require an update on the application code based on HAL V1.4.0

- HAL RCC driver

- To use PLLSAI1 and PLLSAI2 indidependently from main system PLL, PLLSAI1 & PLLSAI2 initialization enriched to add PLL entry clock source and divider M

- RCC_PLLSAI1InitTypeDef includes PLLSAI1Source and PLLSAI1M new fields

- RCC_PLLSAI2InitTypeDef includes PLLSAI2Source and PLLSAI2M new fields

- Add missing RTC clock source definition RCC_RTCCLKSOURCE_NO_CLK
- DFSDM renaming to DFSDM1 (previous definitions preserved for legacy compatibility)

- All macros __HAL_RCC_DFSDM_xxx() renamed to __HAL_RCC_DFSDM1_xxx()
- DfsdmClockSelection field of RCC_PeriphCLKInitTypeDef renamed to Dfsdm1ClockSelection
- RCC_PERIPHCLK_DFSDM renamed to RCC_PERIPHCLK_DFSDM1
- RCC_DFSDMCLKSOURCE_PCLK renamed to RCC_DFSDM1CLKSOURCE_PCLK
- RCC_DFSDMCLKSOURCE_SYSCLK renamed to RCC_DFSDM1CLKSOURCE_SYSCLK
- __HAL_RCC_DFSDM_CONFIG() renamed to __HAL_RCC_DFSDM1_CONFIG()
- __HAL_RCC_GET_DFSDM_SOURCE() renamed to __HAL_RCC_GET_DFSDM1_SOURCE()

- Add missing RTC clock source definition RCC_RTCCLKSOURCE_NO_CLK

- HAL I2C driver

- Update to avoid waiting on STOPF/BTF/AF flag under DMA ISR by using the PPP end of transfer interrupt in the DMA transfer process. This requires the following updates on user application:

- Configure and enable the I2Cx IRQ in HAL_I2C_MspInit() function
- In stm32l4xx_it.c file, I2Cx_IRQHandler() function: add a call to HAL_I2C_IRQHandler() function

- HAL UART/USART drivers

- IRQ Handler global optimization
- Add error management in case of DMA transfer through HAL_DMA_Abort_IT() and DMA XferAbortCallback()
- Polling management update:

- The user Timeout value must be estimated for the overall process duration

- HAL IRDA/SMARTCARD drivers

- Polling management update:

- The user Timeout value must be estimated for the overall process duration

- HAL SPI driver

- Add SPI error management during DMA process: this requires the following updates in the user application:

- Configure and enable the SPIx IRQ in HAL_SPI_MspInit() function
- In stm32l4xx_it.c file, SPIx_IRQHandler() function: add a call to HAL_SPI_IRQHandler() function

- Add and customize the Error Callback API: HAL_SPI_ErrorCallback()

- HAL QSPI driver

- Add QSPI error management during DMA process
- Improve the DMA transmit process by using QSPI TC interrupt instead of waiting on TC flag under DMA ISR.
- These two improvements require the following updates on user application:

- Configure and enable the QSPI IRQ in HAL_QSPI_MspInit() function
- In stm32l4xx_it.c file, QSPI_IRQHandler() function: add a call to HAL_QSPI_IRQHandler() function
- Add and customize the Error Callback API: HAL_QSPI_ErrorCallback()

- Add the management of non-blocking transfer abort service: HAL_QSPI_Abort_IT(). In this case the user must:

- Add new callback HAL_QSPI_AbortCpltCallback() to inform user at the end of abort process
- A new value of State in the HAL_QSPI_StateTypeDef provides the current state during the abort phase

- Polling management update:

- The user Timeout value must be estimated for the overall process duration

- Fix wrong data size management in HAL_QSPI_Receive_DMA()

- New API HAL_QSPI_SetFifoThreshold() and HAL_QSPI_GetFifoThreshold()

- HAL IWDG driver

- New simplified HAL IWDG driver: remove HAL_IWDG_Start(), HAL_IWDG_MspInit() and HAL_IWDG_GetState() APIs

- API functions are:

- HAL_IWDG_Init(): this function insures the configuration and the start of the IWDG counter
- HAL_IWDG_Refresh(): this function insures the reload of the IWDG counter

- Refer to the following example to identify the changes: IWDG_Example

- HAL WWDG driver

- New simplified HAL WWDG driver: remove HAL_WWDG_Start(), HAL_WWDG_Start_IT(), HAL_WWDG_MspDeInit() and HAL_WWDG_GetState() APIs

- Update HAL_WWDG_Refresh() API to remove counter parameter
- New field EWIMode in WWDG_InitTypeDef to specify need for Early Wakeup Interrupt

- API functions are: HAL_WWDG_Init(), HAL_WWDG_MspInit(), HAL_WWDG_Refresh(), HAL_WWDG_IRQHandler() and HAL_WWDG_EarlyWakeupCallback()

- HAL DMA driver

- Global driver code optimization to reduce memory footprint
- New APIs HAL_DMA_RegisterCallback() and HAL_DMA_UnRegisterCallback() to register/unregister the different possible callbacks identified by enum typedef HAL_DMA_CallbackIDTypeDef
- New API HAL_DMA_Abort_IT() to abort DMA transfer in non-blocking mode for interrupt context

- The new registered Abort callback is called when DMA transfer abortion is completed

- Add new Error Codes: HAL_DMA_ERROR_NO_XFER and HAL_DMA_ERROR_NOT_SUPPORTED
- Add __HAL_DMA_GET_COUNTER() macro

- HAL COMP driver

- EXTI configuration done in HAL_COMP_Init() based on TriggerMode field of COMP_InitTypeDef structure; HAL_COMP_Start()/HAL_COMP_Stop() APIs are sufficient to start and stop comparators (HAL_COMP_Start_IT() and HAL_COMP_Stop_IT() are preserved for legacy compatibility)
- Add comparator startup time and scaler bridge stabilization time in HAL_COMP_Init()
- Fix to call HAL_COMP_TriggerCallback() only once when the 2 comparators are configured in window mode
- Inverting & Non-inverting inputs renaming (previous definitions preserved for legacy compatibility)

- COMP_INVERTING_xxx definitions renamed to COMP_INPUT_MINUS_xxx
- COMP_NONINVERTING_xxx definitions renamed to COMP_INPUT_PLUS_xxx

- Blanking sources renaming to highlight Comparator & Timer instances connections (previous definitions preserved for legacy compatibility)

- COMP_BLANKINGSRCE_TIM1OC5 renamed to COMP_BLANKINGSRC_TIM1_OC5_COMP1
- COMP_BLANKINGSRCE_TIM2OC3 renamed to COMP_BLANKINGSRC_TIM2_OC3_COMP1
- COMP_BLANKINGSRCE_TIM3OC3 renamed to COMP_BLANKINGSRC_TIM3_OC3_COMP1
- COMP_BLANKINGSRCE_TIM3OC4 renamed to COMP_BLANKINGSRC_TIM3_OC4_COMP2
- COMP_BLANKINGSRCE_TIM8OC5 renamed to COMP_BLANKINGSRC_TIM8_OC5_COMP2
- COMP_BLANKINGSRCE_TIM15OC1 renamed to COMP_BLANKINGSRC_TIM15_OC1_COMP2
- COMP_BLANKINGSRCE_NONE renamed to COMP_BLANKINGSRC_NONE

- HAL CRYP driver

- Software workaround for AES issue on GCM encryption with payload length not a multiple of 128 bits
- Add support of payload length not multiple of 32 bits

- HAL GPIO driver

- Add missing GPIO_AF6_COMP1 for STM32L431xx/STM32L432xx/STM32L433xx/STM32L442xx/STM32L443xx
- DFSDM renaming to DFSDM1 (previous definitions preserved for legacy compatibility)

- GPIO_AF6_DFSDM renamed to GPIO_AF6_DFSDM1

- HAL HCD driver

- Clear NACK flag before re-enabling the channel for new IN request

- HAL PCD driver

- Host mode

- Use HCLK frequency to set TRDT value

- Device mode

- Force suspend and low-power mode before going to L1 state

- Unmask Start Of Frame interrupt

- HAL TIM driver

- DFSDM renaming to DFSDM1 (previous definitions preserved for legacy compatibility)

- TIM_BREAKINPUTSOURCE_DFSDM renamed to TIM_BREAKINPUTSOURCE_DFSDM1

- HAL SAI driver

- Update HAL_SAI_IRQHandler:

- Add error management in case of DMA transfer through HAL_DMA_Abort_IT() and DMA XferAbortCallback()

- HAL SWPMI driver

- Update initialization sequence in voltage class B

LL Drivers changes

- LL ADC driver

- Fix injected conversion configuration with SW start in LL_ADC_INJ_ConfigQueueContext()

- LL BUS driver

- DFSDM renaming to DFSDM1 (previous definitions preserved for legacy compatibility)

- LL_APB2_GRP1_PERIPH_DFSDM renamed to LL_APB2_GRP1_PERIPH_DFSDM1

- LL COMP driver

- Window mode renaming to highlight Comparator instances connection (previous definitions preserved for legacy compatibility)

- LL_COMP_WINDOWMODE_ENABLE renamed to LL_COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON

- Blanking sources renaming to highlight Comparator & Timer instances connections (previous definitions preserved for legacy compatibility)

- LL_COMP_BLANKINGSRCE_TIM1OC5 renamed to LL_COMP_BLANKINGSRC_TIM1_OC5_COMP1

- LL_COMP_BLANKINGSRCE_TIM2OC3 renamed to LL_COMP_BLANKINGSRC_TIM2_OC3_COMP1

- LL_COMP_BLANKINGSRCE_TIM3OC3 renamed to LL_COMP_BLANKINGSRC_TIM3_OC3_COMP1

- LL_COMP_BLANKINGSRCE_TIM3OC4 renamed to LL_COMP_BLANKINGSRC_TIM3_OC4_COMP2

- LL_COMP_BLANKINGSRCE_TIM8OC5 renamed to LL_COMP_BLANKINGSRC_TIM8_OC5_COMP2

- LL_COMP_BLANKINGSRCE_TIM15OC1 renamed to LL_COMP_BLANKINGSRC_TIM15_OC1_COMP2

- LL I2C driver

- Add SMBus feature support

- LL_I2C_InitTypeDef structure enriched with new PeripheralMode field to indicate I2C or SMBus modes
- New APIs LL_I2C_EnableSMBusAlert(), LL_I2C_DisableSMBusAlert(), LL_I2C_IsEnabledSMBusAlert(), LL_I2C_EnableSMBusPEC(), LL_I2C_DisableSMBusPEC(), LL_I2C_IsEnabledSMBusPEC(), LL_I2C_ConfigSMBusTimeout(), LL_I2C_EnableSMBusTimeout(), LL_I2C_DisableSMBusTimeout(), LL_I2C_IsEnabledSMBusTimeout(), LL_I2C_SetSMBusTimeoutA(), LL_I2C_GetSMBusTimeoutA(), LL_I2C_SetSMBusTimeoutAMode(), LL_I2C_GetSMBusTimeoutAMode(), LL_I2C_SetSMBusTimeoutB(), LL_I2C_GetSMBusTimeoutB(), LL_I2C_SetSMBusTimeoutBMode(), LL_I2C_GetSMBusTimeoutBMode(), LL_I2C_IsActiveSMBusFlag_PECERR(), LL_I2C_IsActiveSMBusFlag_TIMEOUT(), LL_I2C_IsActiveSMBusFlag_ALERT(), LL_I2C_ClearSMBusFlag_PECERR(), LL_I2C_ClearSMBusFlag_TIMEOUT(), LL_I2C_ClearSMBusFlag_ALERT(), LL_I2C_EnableSMBusPECCompare(), LL_I2C_IsEnabledSMBusPECCompare() and LL_I2C_GetSMBusPEC()

- New APIs LL_I2C_SetMode() and LL_I2C_GetMode()
- New APIs LL_I2C_EnableAutoEndMode(), LL_I2C_DisableAutoEndMode() and LL_I2C_IsEnabledAutoEndMode()
- New APIs LL_I2C_EnableReloadMode(), LL_I2C_DisableReloadMode() and LL_I2C_IsEnabledReloadMode()
- New APIs LL_I2C_EnableSlaveByteControl(), LL_I2C_DisableSlaveByteControl() and LL_I2C_IsEnabledSlaveByteControl()
- New APIs LL_I2C_SetTransferRequest(), LL_I2C_GetTransferRequest(), LL_I2C_SetSlaveAddr() and LL_I2C_GetSlaveAdd()
- New APIs LL_I2C_SetTransferSize() and LL_I2C_GetTransferSize()
- New APIs LL_I2C_GenerateStopCondition(), LL_I2C_GenerateStartCondition()
- New APIs LL_I2C_EnableAuto10BitRead(), LL_I2C_DisableAuto10BitRead() and LL_I2C_IsEnabledAuto10BitRead()

- LL PWR driver

- New APIs LL_PWR_EnterLowPowerRunMode() and LL_PWR_ExitLowPowerRunMode()

- LL RCC driver

- DFSDM renaming to DFSDM1 (previous definitions preserved for legacy compatibility)

- LL_RCC_DFSDM_CLKSOURCE renamed to LL_RCC_DFSDM1_CLKSOURCE
- LL_RCC_DFSDM_CLKSOURCE_PCLK renamed to LL_RCC_DFSDM1_CLKSOURCE_PCLK
- LL_RCC_DFSDM_CLKSOURCE_SYSCLK renamed to LL_RCC_DFSDM1_CLKSOURCE_SYSCLK

- LL SYSTEM driver

- New API LL_FLASH_IsPrefetchEnabled()

- LL TIM driver

- DFSDM renaming to DFSDM1 (previous definitions preserved for legacy compatibility)

- LL_TIM_BKIN_SOURCE_DFBK renamed to LL_TIM_BKIN_SOURCE_DF1BK

- New OCRef clear input selection definitions LL_TIM_OCREF_CLR_INT_NC and LL_TIM_OCREF_CLR_INT_ETR
- New OCRef clear API LL_TIM_SetOCRefClearInputSource()

### V1.4.0 / 26-February-2016

Main Changes

- Release of HAL and Low Layer drivers to add support of STM32L431xx/STM32L432xx/STM32L433xx/STM32L442xx/ STM32L443xx devices

- Low Layer driver initialization/de-initialization APIs applicable to all STM32L4xx devices
- CRS peripheral implemented as an extension of HAL RCC (HAL_RCCEx_CRS_xxxx() APIs)
- Superset features device STM32L443xx API User Manuals available (STM32L443xx_User_Manual.chm)

HAL Drivers changes

- HAL generic update

- Add default HSI48_VALUE in stm32l4xx_hal_conf_template

- HAL CRYP update

- New error code HAL_CRYP_BUSY_ERROR to reject new request while ongoing processing

- HAL IRDA/SMARTCARD/UART/USART update

- Improvement of baud rate computation at initialization

LL Drivers changes

- New C files requiring to use USE_FULL_LL_DRIVER compilation switch in user project to benefit from new APIs

- stm32l4xx_ll_crs.c

- LL BUS update

- Add read-back register on clock enable functions to take into account any delay on bus

- LL ADC update

- Trigger sources renaming:

- LL_ADC_REG_TRIG_SW_START renamed to LL_ADC_REG_TRIG_SOFTWARE
- LL_ADC_REG_TRIG_EXT_TIMx_CCy renamed to LL_ADC_REG_TRIG_EXT_TIMx_CHy
- LL_ADC_INJ_TRIG_SW_START renamed to LL_ADC_INJ_TRIG_SOFTWARE
- LL_ADC_INJ_TRIG_EXT_TIMx_CCy renamed to LL_ADC_INJ_TRIG_EXT_TIMx_CHy

- Oversamping data shift renaming:

- LL_ADC_OVS_DATA_SHIFT_NONE renamed to LL_ADC_OVS_SHIFT_NONE
- LL_ADC_OVS_DATA_SHIFT_xxx renamed to LL_ADC_OVS_SHIFT_xxx

- LL DAC update

- Trigger sources renaming:

- LL_DAC_TRIGGER_SOFTWARE renamed to LL_DAC_TRIG_SOFTWARE
- LL_DAC_TRIGGER_TIMx_TRGO renamed to LL_DAC_TRIG_EXT_TIMx_TRGO
- LL_DAC_TRIGGER_EXT_IT9 renamed to LL_DAC_TRIG_EXT_EXTI_LINE9

- LL LPUART update

- Improvement of LPUARTDIV value in baud rate computation in __LL_LPUART_DIV() macro

- LL USART update

- Improvement of USARTDIV value in baud rate computation in __LL_USART_DIV_SAMPLING8() and __LL_USART_DIV_SAMPLING16() macros

### V1.3.0 / 29-January-2016

Main Changes

- New Low Layer driver initialization/de-initialization APIs

- Naming rule is LL_PPP_Init(), LL_PPP_StructInit(), LL_PPP_DeInit() and more initialization APIs when applicable for peripheral PPP: ADC, COMP, CRC, DAC, DMA, EXTI, GPIO, I2C, LPTIM, LPUART, OPAMP, PWR, RCC, RNG, RTC, SPI, SWPMI, TIM and USART.
- New C files requiring to use USE_FULL_LL_DRIVER compilation switch in user project to benefit from new APIs

- stm32l4xx_ll_adc.c, stm32l4xx_ll_comp.c, stm32l4xx_ll_crc.c, stm32l4xx_ll_dac.c, stm32l4xx_ll_dma.c, stm32l4xx_ll_exti.c, stm32l4xx_ll_gpio.c, stm32l4xx_ll_i2c.c, stm32l4xx_ll_lptim.c, stm32l4xx_ll_lpuart.c, stm32l4xx_ll_opamp.c, stm32l4xx_ll_pwr.c, stm32l4xx_ll_rcc.c, stm32l4xx_ll_rng.c, stm32l4xx_ll_rtc.c, stm32l4xx_ll_spi.c, stm32l4xx_ll_swpmi.c, stm32l4xx_ll_tim.c and stm32l4xx_ll_usart.c
- stm32l4xx_ll_utils.c contains some Low Layer utilities for SysTick, Flash latency and clock configuration.

- Fix "parameter unused" GCC compilation warnings on __weak functions

HAL Drivers changes

- HAL generic update

- Declare uwTick as global variable to allow weak HAL_IncTick() API updates in user application
- Add new API HAL_SYSCFG_EnableIOAnalogSwitchBooster() and HAL_SYSCFG_DisableIOAnalogSwitchBooster()

- HAL COMP update

- Allow comparator lock from the reset state with HAL_COMP_Lock()

- HAL CRYP update

- Fix state issue to resume AES calculations

- HAL DMA update

- Fix state issue after DMA transfer error

- HAL FLASH update

- Fix __HAL_FLASH_INSTRUCTION_CACHE_RESET() and __HAL_FLASH_DATA_CACHE_RESET() to allow multiple resets

- HAL I2C update

- Add support of repeated start feature with the following new APIs

- HAL_I2C_Master_Sequential_Transmit_IT(), HAL_I2C_Master_Sequential_Receive_IT() and HAL_I2C_Master_Abort_IT(),
- HAL_I2C_Slave_Sequential_Transmit_IT() and HAL_I2C_Slave_Sequential_Receive_IT()
- HAL_I2C_EnableListen_IT() and HAL_I2C_DisableListen_IT()
- New user callbacks HAL_I2C_ListenCpltCallback() and HAL_I2C_AddrCallback()

- Fix acknowledge failure error management (STOP being automatically generated)
- Review state machine and provide new API HAL_I2C_GetMode() to return HAL_I2C_MODE_MASTER, HAL_I2C_MODE_SLAVE or HAL_I2C_MODE_NONE

- HAL IRDA update

- Add missing IRDA_CLEAR_IDLEF definition for IDLE flag clear with __HAL_IRDA_CLEAR_FLAG()

- HAL SD update

- Fix SD card capacity calculation for cards with capacity over 4GB in HAL_SD_Get_CardInfo()

- HAL SMARTCARD update

- Add missing SMARTCARD_STOPBITS_0_5 definition for frame with 0.5 stop bit
- HAL SMARTCARD guardtime correction to not expect a minimum of 12 etu

- HAL UART update

- Add missing UART_STOPBITS_0_5 definition for frame with 0.5 stop bit
- RX Buffer flush request should not be called at each RXNE processing
- Fix wrong macro used in assert_param in HAL_LIN_SendBreak()

- HAL USART update

- Add missing USART_STOPBITS_0_5 definition for frame with 0.5 stop bit

LL Drivers changes

- LL UTILS update (user code impacted !)

- Move the following functions declaration from stm32l4xx_ll_utils.h to stm32l4xx_ll_utils.c file

- LL_mDelay(), LL_Init1msTick() and LL_SetSystemCoreClock()

- LL ADC update

- FLAG & IT definition name change

- LL COMP update

- Rename InputInverting and InputNonInverting APIs

- LL_COMP_Set{/Get}InputNonInverting() renamed to LL_COMP_Set{/Get}InputMinus
- LL_COMP_Set{/Get}InputInverting() renamed to LL_COMP_Set{/Get}InputPlus

- Remove LL_COMP_SetWindowMode() and LL_COMP_GetWindowMode()

- LL DMA update

- Add helper macro __LL_DMA_GET_CHANNEL_INSTANCE()

- LL GPIO update

- Fix definition LL_GPIO_OUTPUT_OPENDRAIN
- Add the explicit possible values in the API description of LL_GPIO_GetPinMode(), LL_GPIO_GetPinOutputType(), LL_GPIO_GetPinSpeed(), LL_GPIO_GetPinPull(), LL_GPIO_GetAFPin_0_7() and LL_GPIO_GetAFPin_8_15()
- Add GPIO speed definitions LL_GPIO_SPEED_FREQ_LOW, LL_GPIO_SPEED_FREQ_MEDIUM, LL_GPIO_SPEED_FREQ_HIGH and LL_GPIO_SPEED_FREQ_VERY_HIGH to align with HAL GPIO

- LL I2C update

- Add missing function LL_I2C_ConfigFilters() to configure noise filters

- LL LPTIM update

- Add missing functions

- LL_LPTIM_IsEnabled()
- LL_LPTIM_SetWaveform()
- LL_LPTIM_SetPolarity()

- LL OPAMP update

- Rename power range APIs

- LL_OPAMP_Get{/Set}PowerRange() renamed to LL_OPAMP_Get{/Set}CommonPowerRange()

- LL SPI update

- Fix LL_SPI_IsEnabled(), LL_SPI_IsEnabledCRC() and LL_SPI_IsEnabledNSSPulse()
- Remove LL_SPI_Set{/Get}HalfDuplexDirection() functions: this is managed with TransferDirection parameter in LL_SPI_Set{/Get}TransferDirection()

- LL SWPMI update

- Add missing function LL_SWPMI_IsActivated()

- LL TIM update

- Add missing functions

- LL_TIM_CC_IsEnabledChannel()
- LL_TIM_OC_IsEnabledFast(), LL_TIM_OC_IsEnabledPreload() and LL_TIM_OC_IsEnabledClear()
- LL_TIM_IsEnabledMasterSlaveMode()
- LL_TIM_EnableExternalClock(), LL_TIM_DisableExternalClock() and LL_TIM_IsEnabledExternalClock()

- LL USART update

- Add LL_USART_STOPBITS_0_5 definition for usage in LL_USART_Set{/Get}StopBitsLength() and LL_USART_ConfigCharacter()

### V1.2.0 / 25-November-2015

Main Changes

- HAL generic update

- Reduce default HSE startup timeout value to 100ms in Inc\stm32l4xx_hal_conf_template.h file

- HAL PWR update (User application code impacted)

- Stop 1 with main regulator renamed into Stop 0, to be aligned with latest version of Reference Manual
- Change HAL_PWREx_EnterSTOP1Mode(uint32_t Regulator, uint8_t STOPEntry) into HAL_PWREx_EnterSTOP1Mode(uint8_t STOPEntry)

- Application code using HAL_PWREx_EnterSTOP1Mode(PWR_LOWPOWERREGULATOR_ON, STOPEntry) must be updated to use HAL_PWREx_EnterSTOP1Mode(STOPEntry)

- Add new API HAL_PWREx_EnterSTOP0Mode(uint8_t STOPEntry)

- Application code using HAL_PWREx_EnterSTOP1Mode(PWR_MAINREGULATOR_ON, STOPEntry) must be updated to use HAL_PWREx_EnterSTOP0Mode(STOPEntry)

- HAL OPAMP update

- Provide capability to run calibration despite PGA mode by switching temporary to standalone mode

- HAL SAI update

- Update SAI block synchronization selection (User application code impacted)

- Replace uncomplete SAI_SYNCHRONOUS_EXT value for with SAI_SYNCHRONOUS_EXT_SAI1 and SAI_SYNCHRONOUS_EXT_SAI2

- Update external synchronization input selection (User application code impacted)

- Remove useless SAI_SYNCEXT_IN_ENABLE value for SynchroExt field in SAI_InitTypeDef structure

- Add support of 24bits configuration in PCM protocol
- Add codec not ready interrupt management
- Fix computation of data size, frame length, active frame length, slot size and first bit offset in I2S protocol
- Fix mute counter setting in HAL_SAI_EnableRxMuteMode()
- Fix ambiguous clock strobing values: fix HAL_SAI_Init() to set correct CKSTR bits in SAI_xCR1 according to ClockStrobing and AudioMode parameters
- Fill in the Fifo before enable interrupt in HAL_SAI_Transmit_IT()
- Fix assert on active slot selection in HAL_SAI_Init()
- Fix companding mode management in HAL_SAI_Init()

- HAL TSC update

- Improve IODefault state management

- HAL NOR/HAL SRAM/FMC update

- WriteFifo field of FMC_NORSRAM_InitTypeDef structure is not applicable on STM32L47x/STM32L48x devices

- LL PWR update (User application code impacted)

- LL PWR API change to add new Stop 0 mode and update Stop 1 mode definition

- Change LL_PWR_SetPowerMode(uint32_t LowPowerMode) possible LowPowerMode values update

- LL_PWR_MODE_STOP1_LP_REGU renamed into LL_PWR_MODE_STOP1

- Application code using LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1_LP_REGU) must be updated to use LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1)

- LL_PWR_MODE_STOP1_MAIN_REGU renamed into LL_PWR_MODE_STOP0

- Application code using LL_PWR_SetPowerMode(LL_PWR_MODE_STOP1_MAIN_REGU) must be updated to use LL_PWR_SetPowerMode(LL_PWR_MODE_STOP0)

### V1.1.1 / 16-October-2015

Main Changes

- HAL generic update

- Fine tuning of Inc\stm32l4xx_hal_conf_template.h file to keep Flash prefetch off as default system configuration (PREFETCH_ENABLE set to 0)

- HAL TIM update

- Removed useless assert_param() macro check on input parameters in HAL_TIM_OC_ConfigChannel(), HAL_TIM_PWM_ConfigChannel() and HAL_TIM_ConfigClockSource(),

- LL ADC update

- Fix LL_ADC_GetAnalogWDMonitChannels() for AWD2 and AWD3

- LL RCC update

- Add new API LL_RCC_LSE_DisableCSS()

- LL UTILS update

- Fix LL_GetPackageType()

### V1.1.0 / 16-September-2015

Main Changes

- Add Low Layer drivers allowing performance and footprint optimization

- Low Layer drivers APIs provide register level programming: they require deep knowledge of peripherals described in STM32L4x6 Reference Manual
- Low Layer drivers are available for: ADC, COMP, Cortex, CRC, DAC, DMA, EXTI, GPIO, I2C, IWDG, LPYIM, LPUART, OPAMP, PWR, RCC, RNG, RTC, SPI, SWPMI, TIM, USART, WWDG peripherals and additionnal Low Level Bus, System and Utilities APIs.
- Low Layer drivers APIs are implemented as static inline function in new Inc/stm32l4xx_ll_ppp.h files for PPP peripherals, there is no configuration file and each stm32l4xx_ll_ppp.h file must be included in user code.

- HAL ADC update

- Channel 5 is not usable for ADC3

- HAL CAN update

- Update HAL_CAN_IRQHandler() to clear ERRI bit prior to call HAL_CAN_ErrorCallback()

- HAL COMP update

- Update HAL_COMP_Init() for low power optimization in case of COMP_INVERTINGINPUT_VREFINT

- HAL CRC update

- Add new API HAL_CRYPEx_ProcessSuspend()

- HAL DMA update

- Update HAL_DMA_IRQHandler() to set HAL_DMA_ERROR_TE error bit in handle ErrorCode field

- HAL FLASH update

- Add option byte OB_USER_nRST_SHDW to be used with HAL_FLASHEx_OBProgram()

- HAL GPIO update

- Rename GPIO speed definitions to GPIO_SPEED_FREQ_LOW, GPIO_SPEED_FREQ_MEDIUM, GPIO_SPEED_FREQ_HIGH and GPIO_SPEED_FREQ_VERY_HIGH
- Fix macro __HAL_GPIO_EXTI_GENERATE_SWIT()

- HAL PWR update

- Fix HAL_PWR_DisableWakeUpPin() to clear only appropriate bits in PWR CR3 register
- Combination of GPIO pins possible in HAL_PWREx_EnableGPIOPullUp(), HAL_PWREx_DisableGPIOPullUp(), HAL_PWREx_EnableGPIOPullDown() and HAL_PWREx_DisableGPIOPullDown()

- HAL RCC update

- Add LSE Clock Security System (CSS) management with new APIs: HAL_RCCEx_EnableLSECSS_IT(), HAL_RCCEx_LSECSS_IRQHandler() and HAL_RCCEx_LSECSS_Callback()
- Add RCC_MCO1SOURCE_NOCLOCK to provide capability to disable MCO output in HAL_RCC_MCOConfig()
- Update HAL_RCC_OscConfig() and HAL_RCCEx_PeriphCLKConfig() to keep backup domain enabled when configuring respectively LSE and RTC clock source
- Update HAL_RCCEx_DisablePLLSAI1() and HAL_RCCEx_DisablePLLSAI2() to disable respectively PLLSAI1 and PLLSAI2 clock outputs
- Update HAL_RCCEx_GetPeriphCLKFreq() to return the frequency in Hz applied to peripherals via HAL_RCCEx_PeriphCLKConfig()
- Update HAL_RCC_DeInit() to set default MSI range
- Remove old workaround on LSE drive medium configuration values

- HAL SPI update

- Fix issue to receive CRC in RX 2 lines mode 8-bit dataSize and even buffer size.

- HAL TIM update

- Fix macro __HAL_TIM_SET_COMPARE()

- HAL UART update

- Remove enable of Error interrupt in HAL_UART_Transmit_IT()

### V1.0.0 / 26-June-2015

Main Changes

- First official release of STM32L4xx HAL Drivers for STM32L471xx/STM32L475xx/ STM32L476xx/ STM32L485xx and STM32L486xx devices.

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